This invention relates to a demodulator for use in deriving demodulated signals from an input signal subjected to multiple quadrature amplitude modulation (often abbreviated to QAM). It is to be noted throughout the instant specification that k-by-k quadrature amplitude modulation is used as the multiple quadrature amplitude modulation where k is equal to 2.sup.N and N represents an integer which is greater than unity and that the input signal has a pair of phase components, each having k-levels. Such modulation may be called an M-ary (M=k.sup.2) quadrature amplitude modulation.
In order to favorably demodulate such an input signal into demodulated signals, a reference carrier wave should precisely and stably be produced in a demodulator of the above-mentioned type, as well known in the art. In addition, a d.c. drift resulting from variation of a d.c. source voltage should strictly be suppressed in the demodulator so as to keep an eye aperture invariable in an eye pattern.
In Japanese Unexamined Patent Publication No. Syo 57-131151, namely No. 131151/1982, Y. Yoshida discloses a demodulator comprising a voltage-controlled oscillator circuit for producing a pair of oscillation signals, a pair of phase detectors responsive to an input signal and the oscillation signals for producing a pair of baseband signals phase-detected, and a pair of analog-to-digital converters responsive to the baseband signals for producing digital signals in a bit parallel fashion. The digital signals are partly produced as demodulated signals and partly processed into a phase control signal in compliance with a predetermined logic rule to be fed back to the voltage-controlled oscillator circuit. As a result, the voltage-controlled oscillator circuit generates the phase-controlled oscillation signals serving as the reference carrier wave.
In another Japanese Unexamined Patent Publication No. Syo 57-131152, namely, No. 131152/1982, Yashida also reveals another demodulator similar in structure to the above-mentioned demodulator except that a gain control operation is carried out by the use of a gain control signal to suppress the d.c. drift. For this purpose, the digital signals supplied from at least one analog-to-digital converter are processed into the gain control signal in compliance with another logic rule.
At any rate, the analog-to-digital converters are used to discriminate levels of each phase component. Each analog-to-digital converter becomes intricate and expensive with an increase of the levels.